A 3.4 GB/s Full-Swing 2^7-1 PRBS generator Integrated with
Fast-Locking PLL using Transmission gate Charge-Pump in
0.18-μm CMOS for HDMI applications


Ramanjaneyulu Ningampalli
Satyanarayana Donti and
SatyaPrasad Kodati


1) The proposed LFSR generator lacks a start-up circuit to avoid the all-zero stall state.
2) Some important parameters of the charge pump, like the backlash time, are not considered.
3) The schematic of the delay cell has no output.
4) The phase-noise and jitter specifications are inaccurate and as such make no sense.
5) It seems that the paper only contains inaccurate simulations. It lacks both theoretical
background and practical experiments.

