@*** Visokofrekvencni vir ADF4351+HMC273 - S53MV 22.03.2017 ***

@*** Konstante mikrokrmilnika LPC2138/01 ***
.equ	KVARC,14745600		@frekvenca kristala (Hz)
.equ	CLK,KVARC*4		@frekvenca jedra ARM (PLL)
.equ	PCLK,CLK/2		@frekvenca vhodno/izhodnih enot (APBDIV)
.equ	BAUD,PCLK/153600	@modulo deljenja UART za 9600bps*16
.equ	N1US,CLK/3000000	@konstanta cakanja T1US za HD44780

@*** Vhodno/izhodni prikljucki LPC2138/01 ***
@/RESET - vhod vezan na /ERROR.LP2951 in na /DTR.FT231XS
@P0.0/TXD0/PWM1 - izhod vezan na RXD.FT231XS 
@P0.1/RXD0/PWM3/EINT0 - vhod vezan na TXD.FT231XS
@P0.2.od/SCL0/CAP0.0 -
@P0.3.od/SDA0/MAT0.0/EINT1 -
@P0.4/SCK0/CAP0.1/AD0.6 - izhod slabilec HMC273 1dB
@P0.5/MISO0/MAT0.1/AD0.7 - izhod slabilec HMC273 2dB
@P0.6/MOSI0/CAP0.2/AD1.0 - izhod slabilec HMC273 4dB
@P0.7/SSEL0/PWM2/EINT2 - izhod slabilec HMC273 8dB
@P0.8/TXD1/PWM4/AD1.1 - izhod slabilec HMC273 16dB
@P0.9/RXD1/PWM6/EINT3 - izhod ON/OFF ADF4351 PDB
@P0.10/RTS1/CAP1.0/AD1.2 - izhod ADF4351 CLK
@P0.11.od/CTS1/CAP1.1/SCL1 - vhod ADF4351 MOXOUT
@P0.12/DSR1/MAT1.0/AD1.3 - izhod ADF4351 LE
@P0.13/DTR1/MAT1.1/AD1.4 - izhod ADF4351 DATA
@P0.14.od/DCD1/EINT1/SDA1/BOOTLOADER(!) - vhod vezan na /RTS.FT231XS 
@P0.15/RI1/EINT2/AD1.5 -
@P0.16-23 - digitalni izhodi za LCD D0-7.HD44780
@P0.24 - ne obstaja ***
@P0.25/AD0.4/AOUT -
@P0.26/AD0.5 -
@P0.27/AD0.0/CAP0.1/MAT0.1 -
@P0.28/AD0.1/CAP0.2/MAT0.2 -
@P0.29/AD0.2/CAP0.3/MAT0.3 -
@P0.30/AD0.3/EINT3/CAP0.0 -
@P0.31(!) - nepovezan ***
@P1.0-15 - ne obstajajo ***
@P1.16-19 - vhodi z vgrajenim PULL-UP za tipke na maso
@P1.20(!) - nepovezan ***
@P1.21 - digitalni izhod za LCD RS.HD44780
@P1.22-25 - nepovezani ***
@P1.26(!) - nepovezan ***
@P1.27-29 - nepovezani ***
@P1.30 - digitalni izhod za LCD E.HD44780
@P1.31 - nepovezan ***

@*** Dodelitev pomnilnika RAM ***
.equ	SKLAD,0x40000100	@sklad raste navzdol -256byte

@*** Ukazi za delovanje zbirnika Gnu ***
.text
.arm

@*** Tabela izjem na zacetnem naslovu 0 ***
IZJEME:	B	ZACNI	@RESET
	B	IZJEME	@Undef
	B	IZJEME	@SWI
	B	IZJEME	@PAbt
	B	IZJEME	@DAbt
	NOP		@Reserved Vector
	B	IZJEME	@IRQ
	B	IZJEME	@FIQ

@*** Pocisti pomnilnik do nevarne lokacije 0x000001FC ***
.balign	512,0

@*** Inicializiraj MAM *** (R0-1)
MAM:	LDR	R0,=0xE01FC000	@MAMCR=0
	MOV	R1,#0
	STRB	R1,[R0]
	LDR	R0,=0xE01FC004	@MAMTIM=3
	MOV	R1,#3
	STRB	R1,[R0]
	LDR	R0,=0xE01FC000	@MAMCR=2
	MOV	R1,#2
	STRB	R1,[R0]
	MOV	PC,LR
.ltorg

@*** Nastavi PCONP in APBDIV *** (R0-1)
PWRCLK:	LDR	R0,=0xE01FC0C4	@PCONP
	LDR	R1,=0x00000008	@UART0
	STR	R1,[R0]
	LDR	R0,=0xE01FC100	@APBDIV=2
	MOV	R1,#2
	STRB	R1,[R0]
	MOV	PC,LR
.ltorg

@*** Inicializiraj PLL *** (R0-2)
PLL:	LDR	R0,=0xE01FC084	@PLLCFG=0x24 P=2,M-1=3
	MOV	R1,#0x23
	STRB	R1,[R0]
	LDR	R0,=0xE01FC080	@PLLCON=0x01 PLL-enable
	MOV	R1,#0x01
	STRB	R1,[R0]
	LDR	R0,=0xE01FC08C	@PLLFEED
	MOV	R1,#0xAA
	MOV	R2,#0x55
	STRB	R1,[R0]
	STRB	R2,[R0]
PLL1:	LDR	R0,=0xE01FC088	@PLLSTAT cakanje uklenitve
	LDR	R1,[R0]
	ANDS	R1,R1,#0x400
	BEQ	PLL1
	LDR	R0,=0xE01FC080	@PLLCON=0x03 PLL-enable&connect
	MOV	R1,#0x03
	STRB	R1,[R0]
	LDR	R0,=0xE01FC08C	@PLLFEED
	MOV	R1,#0xAA
	MOV	R2,#0x55
	STRB	R1,[R0]
	STRB	R2,[R0]
	MOV	PC,LR
.ltorg

@*** Inicializiraj GPIO in DAC *** (R0-1)
GPIO:	LDR	R0,=0xE002C000	@PINSEL0 P0.0-1=UART0
	LDR	R1,=0x00000005
	STR	R1,[R0]
	LDR	R0,=0xE002C004	@PINSEL1 P0.25=AOUT
	LDR	R1,=0x00080000
	STR	R1,[R0]
	LDR	R0,=0xE002C014	@PINSEL2 izklop JTAG&TRACE
	LDR	R1,[R0]
	BIC	R1,R1,#0x0C
	STR	R1,[R0]
	LDR	R0,=0xE01FC1A0	@SCS=0x03 high-speed GPIO 0&1
	MOV	R1,#0x03
	STR	R1,[R0]
	LDR	R0,=0x3FFFC014	@FIO0PIN vsi 1
	MOV	R1,#-1
	STR	R1,[R0]
	LDR	R0,=0x3FFFC034	@FIO1PIN vsi 0
	MOV	R1,#0
	STR	R1,[R0]
	LDR	R0,=0x3FFFC000	@FIO0DIR izhodi 0.0-0.10, 0.12-0.13, 0.15-0.31
	LDR	R1,=0xFFFFB7FF
	STR	R1,[R0]
	LDR	R0,=0x3FFFC020	@FIO1DIR izhodi 1.20-1.31
	LDR	R1,=0xFFF00000
	STR	R1,[R0]
	LDR	R0,=0xE006C000	@DACR sredina skale, visok tok
	LDR	R1,=0x00008000
	STR	R1,[R0]
	MOV	PC,LR
.ltorg

@*** Inicializiraj UART0 *** (R0-1)
UART0:	LDR	R0,=0xE000C00C	@U0LCR=0x83 DLAB=1,no-parity,1stop,8bit
	MOV	R1,#0x83
	STRB	R1,[R0]
	LDR	R0,=0xE000C000	@U0DLL 
	LDR	R1,=BAUD
	STRB	R1,[R0]
	LDR	R0,=0xE000C004	@U0DLM
	MOV	R1,R1,LSR#8
	STRB	R1,[R0]
	LDR	R0,=0xE000C008	@U0FCR=0xC1 RXtrig=14bit,FIFOenable
	MOV	R1,#0xC1
	STRB	R1,[R0]
	LDR	R0,=0xE000C00C	@U0LCR=0x03 DLAB=0,no-parity,1stop,8bit
	MOV	R1,#0x03
	STRB	R1,[R0]
	MOV	PC,LR
.ltorg

@*** Inicializiraj HD44780 5X7,2vrstici,CGRAM *** (R0-3)
INILCD:	STR	LR,[SP,#-4]!	@resi link
	BL	T100MS		@zakasnitev 100ms
	MOV	R0,#0x38	@function set 
	BL	UKAZ
	BL	T4MS		@zakasnitev 4ms
	MOV	R0,#0x38	@function set
	BL	UKAZ
	MOV	R0,#0x38	@function set
	BL	UKAZ
	MOV	R0,#0x08	@display off
	BL	UKAZ
	MOV	R0,#0x01	@display clear
	BL	UKAZ
	BL	T4MS		@zakasnitev 4ms
	MOV	R0,#0x06	@entry mode set
	BL	UKAZ
	MOV	R0,#0x0C	@display on
	BL	UKAZ
	MOV	R0,#0x40	@set CGRAM address
	BL	UKAZ
	MOV	R2,#64		@prepisi 8 znake = 64 bajtov
	LDR	R3,=INILCD2
INILCD1:
	LDRB	R0,[R3],#1
	BL	ZNAK
	SUBS	R2,R2,#1
	BNE	INILCD1
	MOV	R0,#0x80	@set DDRAM address zacetek prve vrstice
	BL	UKAZ
	LDR	PC,[SP],#4	@povratek na link
.ltorg
INILCD2:
.byte	0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x04	@0=praznina
.byte	0x10,0x10,0x10,0x10,0x10,0x10,0x00,0x04	@1=enacrtica
.byte	0x14,0x14,0x14,0x14,0x14,0x14,0x00,0x04	@2=dvecrtici
.byte	0x15,0x15,0x15,0x15,0x15,0x15,0x00,0x04	@3=tricrtice
.byte	0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x1F	@0=praznina podcrtana
.byte	0x10,0x10,0x10,0x10,0x10,0x10,0x00,0x1F	@1=enacrtica podcrtana
.byte	0x14,0x14,0x14,0x14,0x14,0x14,0x00,0x1F	@2=dvecrtici podcrtana
.byte	0x15,0x15,0x15,0x15,0x15,0x15,0x00,0x1F	@3=tricrtice podcrtana
.align

@*** Podcrtan stolpec v desno v drugi vrstici iz R3 *** (R0-3)
STOLP:	STR	LR,[SP,#-4]!	@resi link
	MOV	R0,#0xC0	@set DDRAM address druga vrstica
	BL	UKAZ
	MOV	R2,#0
STOLP1:	MOV	R0,#0		@praznina za velike korake po 16
	CMP	R3,#16		@ena crtica?
	MOVCS	R0,#1
	CMP	R3,#32		@dve crtici?
	MOVCS	R0,#2
	CMP	R3,#48		@tri crtice?
	MOVCS	R0,#3
	AND	R1,R3,#15	@podcrtaj pripadajoci znak za male korake po 1
	CMP	R1,R2
	ADDEQ	R0,R0,#4
	BL	ZNAK		@izpisi crtice
	SUBS	R3,R3,#48	@odstej 3 crtice, negativno ustavi?
	ANDMI	R3,R3,#15
	ADD	R2,R2,#1	@zanka 16 znakov
	CMP	R2,#16
	BMI	STOLP1
	LDR	PC,[SP],#4	@povratek na link
.ltorg

@*** Znak iz R0 v HD44780 *** (R0-1)
ZNAK:	STR	LR,[SP,#-4]!	@resi link
	LDR	R1,=0x3FFFC016	@FIO0PIN2 podatek
	STRB	R0,[R1]
	LDR	R1,=0x3FFFC03A	@FIO1SET2
	MOV	R0,#0x20	@RS=1
	STRB	R0,[R1]
	BL	T1US		@zakasnitev 1us
	LDR	R1,=0x3FFFC03B	@FIO1SET3
	MOV	R0,#0x40	@vklopi E
	STRB	R0,[R1]
	BL	T1US		@zakasnitev 1us
	LDR	R1,=0x3FFFC03F	@FIO1CLR3
	MOV	R0,#0x40	@izklopi E
	STRB	R0,[R1]
	BL	T100US		@zakasnitev 100us
	LDR	PC,[SP],#4	@povratek na link
.ltorg

@*** Ukaz iz R0 v HD44780 *** (R0-1)
UKAZ:	STR	LR,[SP,#-4]!	@resi link
	LDR	R1,=0x3FFFC016	@FIO0PIN2 podatek
	STRB	R0,[R1]
	LDR	R1,=0x3FFFC03E	@FIO1CLR2
	MOV	R0,#0x20	@RS=0
	STRB	R0,[R1]
	BL	T1US		@zakasnitev 1us
	LDR	R1,=0x3FFFC03B	@FIO1SET3
	MOV	R0,#0x40	@vklopi E
	STRB	R0,[R1]
	BL	T1US		@zakasnitev 1us
	LDR	R1,=0x3FFFC03F	@FIO1CLR3
	MOV	R0,#0x40	@izklopi E
	STRB	R0,[R1]
	BL	T100US		@zakasnitev 100us
	LDR	PC,[SP],#4	@povratek na link

@*** Zakasnitev 1us *** (R0)
.balign	16,0
T1US:	MOV	R0,#N1US
T1US1:	SUBS	R0,R0,#1
	BPL	T1US1
	MOV	PC,LR

@*** Zakasnitev 100us *** (R0-1)
T100US:	STR	LR,[SP,#-4]!	@resi link
	MOV	R1,#100
T100US1:
	BL	T1US
	SUBS	R1,R1,#1
	BPL	T100US1
	LDR	PC,[SP],#4	@povratek na link

@*** Zakasnitev 4ms *** (R0-2)
T4MS:	STR	LR,[SP,#-4]!	@resi link
	MOV	R2,#40
T4MS1:	BL	T100US
	SUBS	R2,R2,#1
	BPL	T4MS1
	LDR	PC,[SP],#4	@povratek na link

@*** Zakasnitev 100ms *** (R0-3)
T100MS:	STR	LR,[SP,#-4]!	@resi link
	MOV	R3,#25
T100MS1:
	BL	T4MS
	SUBS	R3,R3,#1
	BPL	T100MS1
	LDR	PC,[SP],#4	@povratek na link

@*** Zakasnitev 1s *** (R0-3)
T1S:	STR	LR,[SP,#-4]!	@resi link
	MOV	R3,#250
T1S1:	BL	T4MS
	SUBS	R3,R3,#1
	BPL	T1S1
	LDR	PC,[SP],#4	@povratek na link

@*** Zacetek programa po resetu ***
ZACNI:	LDR	SP,=SKLAD	@inicializiraj SP
	BL	MAM	@inicializiraj MAM
	BL	PWRCLK	@nastavi PCONP in APBDIV
	BL	PLL	@inicializiraj PLL
	BL	GPIO	@inicializiraj GPIO in DAC
	BL	UART0	@inicializiraj UART0
	BL	INILCD	@inicializiraj HD44780 5X7,2vrstici,CGRAM
	MOV	R0,#0x80	@prva vrstica besedila
	BL	UKAZ
	LDR	R2,=ZACNI5
ZACNI1:	LDRB	R0,[R2],#1
	MOVS	R0,R0
	BEQ	ZACNI2
	BL	ZNAK
	B	ZACNI1
ZACNI2:	MOV	R0,#0xC0	@druga vrstica besedila
	BL	UKAZ
	LDR	R2,=ZACNI6
ZACNI3:	LDRB	R0,[R2],#1
	MOVS	R0,R0
	BEQ	ZACNI4
	BL	ZNAK
	B	ZACNI3
ZACNI4:	BL	T1S		@zakasnitev 1s
	MOV	R8,#31		@zacetni stevec zanke
	B	ZANKA	@glavna zanka programa
.ltorg
ZACNI5:	.asciz	"VF izvor ADF4351"
ZACNI6:	.asciz	"S53MV 22.03.2017"
.align

@*** Glavna zanka programa ***
ZANKA:	AND	R0,R8,#0x0F	@izpis nabora znakov v prvo vrstico
	ORR	R0,R0,#0x80	@nastavi polozaj
	BL	UKAZ
	MOV	R0,R8		@izpisi znak
	BL	ZNAK
	AND	R3,R8,#0xFF	@izpisi rastoci stolpec v drugo vrstico
	ADD	R3,R3,R3,LSL#1
	BL	STOLP

	TST	R8,#0x04	@izmenicno miganje vseh izhodov
	MOVEQ	R0,#0x55
	MOVNE	R0,#0xAA
	LDR	R1,=0x3FFFC014	@FIO0PIN0 P0.0-7
	STRB	R0,[R1]
@	LDR	R1,=0x3FFFC015	@FIO0PIN1 P0.8-15
@	STRB	R0,[R1]
	LDR	R1,=0x3FFFC017	@FIO0PIN3 P0.24-31
	STRB	R0,[R1]

	BL	INIADF		@postavi registre ADF4351

	LDR	R0,=0xE000C000	@U0THR izpis stevca na UART0
	STRB	R8,[R0]
	LDR	R0,=0xE006C000	@DACR zaga iz stevca, visok tok
	AND	R1,R8,#0xFF
	MOV	R1,R1,LSL#8
	STR	R1,[R0]
	BL	T100MS		@zakasnitev 100ms
	ADD	R8,R8,#1	@stevec zanke
	B	ZANKA
.ltorg

@*** Postavi registre ADF4351 ***
INIADF:	STR	LR,[SP,#-4]!	@resi link
	LDR	R3,=0x00580005	@register5: DLD
	BL	WADF
	LDR	R3,=0x008FE03C	@register4: FUND, RF=/1, BSCD=240, VCO, RFOUT=+5dBm 
	BL	WADF
	LDR	R3,=0x00800003	@register3: BSCM=1
	BL	WADF
	LDR	R3,=0x78004E42	@register2: LSMODE, DLD, R=1, CPC=7, PDP=+
	BL	WADF
	LDR	R3,=0x0800FF41	@register1: 8/9, P=1, MOD=4000=0xFA0
	BL	WADF
	LDR	R3,=0x00322AA0	@register0: INT=100, FRAC=1365=0x555
	BL	WADF
	LDR	PC,[SP],#4	@povratek na link
.ltorg

@*** 32-bitni ukaz iz R3 v ADF4351 *** (R0-3)
WADF:	STR	LR,[SP,#-4]!	@resi link
	MOV	R2,#32
WADF1:	ADDS	R3,R3,R3	@pomikalni register podatkov
	LDRCS	R0,=0x3FFFC019	@FIO0SET1
	LDRCC	R0,=0x3FFFC01D	@FIO0CLR1
	MOV	R1,#32		@P0.13=DATA
	STRB	R1,[R0]
	BL	T1US
	LDR	R0,=0x3FFFC019	@FIO0SET1 impulz CLK
	MOV	R1,#4		@P0.10=CLK
	STRB	R1,[R0]
	BL	T1US
	LDR	R0,=0x3FFFC01D	@FIO0CLR1
	MOV	R1,#4		@P0.10=CLK
	STRB	R1,[R0]
	SUBS	R2,R2,#1	@zanka 32 bitov
	BNE	WADF1
	BL	T1US
	LDR	R0,=0x3FFFC019	@FIO0SET1 impulz LE
	MOV	R1,#16		@P0.12=LE
	STRB	R1,[R0]
	BL	T1US
	LDR	R0,=0x3FFFC01D	@FIO0CLR1
	MOV	R1,#16		@P0.12=LE
	STRB	R1,[R0]
	LDR	PC,[SP],#4	@povratek na link
.ltorg

@*** Konec delovanja zbirnika Gnu ***
.end