Semihosting

Semihosting enables an application running on an ARM target to use input and output facilities on a host computer running RealView Debugger. It is implemented by a set of defined software interrupt operations.

Standard semihosting, where the target processor enters debug state while the semihosting operation is performed, is enabled by default for all ARM targets.

You can disable semihosting by setting the internal variable semihost_enabled to 0 from the Debug tab of the Register pane, or from the Semihost tab for localhost connections to RealView ARMulator ISS.

DCC semihosting

Multi-ICE is able to use the Debug Communications Channel (DCC) for semihosting. It is generally faster than standard semihosting, and interrupts are always serviced because the target processor does not enter debug state. However, standard semihosting is the default setting because DCC semihosting is more intrusive on the target.

If you are using Multi-ICE, you can select DCC semihosting by setting the internal variable semihost_enabled to DCC (2) from the Debug tab of the Register pane.

  For more details on DCC semihosting with RealView Debugger, see the RealView Debugger v1.8 User Guide.