cached_dhry
===========

This directory contains "Cached Dhrystone" example code.

This comprises the standard Dhrystone code, plus additional routines to initialise 
caches/TCMs, MMU/MPU, clocks, etc, for ARM920, 926, 946, 966.

These examples will run on ARMulator or real hardware e.g. Integrator Core Modules.

These examples can be used to benchmark the Dhrystone performance of these processors, 
(e.g. with various cache/TCM sizes, clock speeds, etc), or may be used as a framework
on which to build your own own C/C++ applications.

